Datasheet4U Logo Datasheet4U.com

MBM29LV017 - 16M (2M x 8) BIT FLASH MEMORY

General Description

The MBM29LV017 is a 16M-bit, 3.0 V-only Flash memory organized as 2M bytes of 8 bits each.

The 2M bytes of data is divided into 32 sectors of 64K bytes of flexible erase capability.

The 8 bits of data will appear on DQ0 to DQ7.

Key Features

  • Address specification is not necessary during command sequence.
  • Single 3.0 V read, program and erase Minimizes system level power requirements.
  • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs.
  • Compatible with JEDEC-standard world-wide pinouts 40-pin TSOP (I) (Package suffix: PTN-Normal Bend Type, PTR-Reversed Bend Type) 48-ball FBGA (Package suffix: PBT).
  • Minimum 100,000 program/erase cycles.
  • High performance 8.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
MBM29LV017-12 16M (2M x 8) BIT FLASH MEMORY Fujitsu
MBM29LV017-80 16M (2M x 8) BIT FLASH MEMORY Fujitsu
MBM29LV017-90 16M (2M x 8) BIT FLASH MEMORY Fujitsu
MBM29LV016B-12 16M (2M x 8) BIT FLASH MEMORY Fujitsu
MBM29LV016B-80 16M (2M x 8) BIT FLASH MEMORY Fujitsu

Other Datasheets by Fujitsu Semiconductor Limited

Part Number Description
MBM29LV016B 16M (2M x 8) BIT FLASH MEMORY
MBM29LV016T 16M (2M x 8) BIT
MBM29LV001BC 1M (128K x 8) BIT FLASH MEMORY
MBM29LV001TC 1M (128K x 8) BIT
MBM29LV002BC 2M (256K x 8) BIT FLASH MEMORY

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FUJITSU SEMICONDUCTOR DATA SHEET DS05-20857-4E FLASH MEMORY CMOS 16M (2M × 8) BIT MBM29LV017-80/-90/-12 s FEATURES • Address specification is not necessary during command sequence • Single 3.0 V read, program and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs • Compatible with JEDEC-standard world-wide pinouts 40-pin TSOP (I) (Package suffix: PTN-Normal Bend Type, PTR-Reversed Bend Type) 48-ball FBGA (Package suffix: PBT) • Minimum 100,000 program/erase cycles • High performance 80 ns maximum access time • Sector erase architecture Uniform sectors of 64K bytes each Any combination of sectors can be concurrently erased.